LG 32LD322H - Manuale (Pagina 168)

Copyright ©2010 LG Electronics Inc. All rights reserved.
Diagrammi a blocchi
R
G
B
C
O
M
P
O
N
E
N
T
C
O
M
P
O
N
E
N
T
F
-
S
C
A
R
T
IF
_N
/P
_
M
S
T
A
R
DD
R3
(
1
G
B
)
IC
1
2
0
1
NA
ND F
la
sh
HY
NI
X
(2
G
)
IC
1
0
2
U
S
B
Di
g
it
a
l a
m
p
(N
T
P
70
00
)
IC
5
0
1
CO
M
P
_
Y
/P
b/
P
r
S
C
1
_
C
V
B
S
/R
/G
/B
/F
B
_
IN
I2
S
DS
U
B
_
R
/G
/B
Tun er
( TDTJ
-S001 D)
TU37 02
L
C
D
Pa
n
e
l
CI Slot
( P1901 )
74LCX244
Buffer
I C1902
P
C
M
_
A
[0:
7]
TU
_
C
V
B
S
P
C
M
_
A
[0:
7]
DD
R3
(
1
G
B
)
IC
1
2
0
2
B_
T
M
D
Q
[0
:1
6
]
MI
C
2
0
0
9
Y
M
6
US
B
P
o
w
e
r
IC
4
0
2
US
B
P
o
w
e
r
S
C
1
_
L
/R
_
IN
, E
_
A
M
_
A
U
D
IO
,A
V
_
L
/R
_
IN
,
C
O
M
P
_L
/R
_I
N
, P
C
_L
/R
_I
N
TV
/D
TV
_
V
O
U
T
A_
T
M
D
Q
[0
:1
6
]
H
e
a
d
P
ho
n
e
RS
-232
C
M
A
X
3
23
2C
D
R
IC
11
06
S
P
D
IF
SPD
IF
_
O
U
T
DS
UB
_H/
VSY
NC
HP
_
L
/R
O
U
T
L/
R
PI
_
T
S
_
D
A
T
A
[0
:7
]
FE
_
T
S
_
D
A
T
A
[0
:7
]
C
I_A
DD
R
[0:
7]
AUD
IO
I
N
NE
C
_
T
X
/R
X
H
P
D
1
/2
, H
D
M
I_
C
E
C
, 5
V
_
H
D
M
I 1
/2
T
M
D
S
[0
:7
] (
D
a
ta
, C
lo
c
k
(+
/-
))
US
B
_
D
M
/D
P
EE
P
R
O
M
M2
4
M
0
1-
H
R
M
N
6
(I
C
1
0
4
)
EE
P
R
O
M
CA
T
2
4
W
C
0
8
W
-T
(HDC
P
)I
C
1
0
3
I2
C
L
V
D
S
(8
bi
t
or
1
0
bi
t)
Se
ri
a
l F
la
sh
IC
1
4
0
1
Fo
r Bo
o
t
HD
M
I 1/
2
M
P
23
05
IC
13
02
D
C
/D
C
C
onv
.
(1
2
V
to
5
V
)
M
P
50
00
IC
13
05
5V
12
V
Po
w
e
r SW
(1
2
V
O
n
/O
ff
)
N
E
C
Mi
c
o
m
uP
D
7
8F
11
6
4
A
(I
C
1102
)
L
E
D Dr
iv
e
r
I2
C
S
W
IC
1
0
06
/1
00
7
I2
C
I2
C
I2
C
M
S
T_
TX
/R
X
L
E
D
C
lo
c
k
S
p
e
a
k
e
r
O
u
t
A
udi
o
a
m
p
(T
P
A
3
1
2
4
D
2
)
IC
1
3
0
9
L/
R
S
p
e
a
k
e
r
O
u
t
C
o
n
tr
o
l
Up
/D
o
w
n
TU
_
S
IF
IF
_
A
G
C
74L
V
C
1
62
44
Bu
ff
e
r
IC
15
01
LGDT1129
FPGA
I C1503
FE
_
T
S
_
D
A
T
A
[0
]
P
K
T_
D
A
TA
[0
]
CI
_
T
S
_
D
A
T
A
[0
:7
]
R
G
B
C
O
M
P
O
N
E
N
T
C
O
M
P
O
N
E
N
T
F
-
S
C
A
R
T
IF
_N
/P
_
M
S
T
A
R
Pb
/P
r
Tun er
( TDTJ
-S001 D)
TU37 02
CI Slot
( P1901 )
74LCX244
Buffer
I C1902
TU
_
C
V
B
S
MI
C
2
0
0
9
Y
M
6
US
B
P
o
w
e
r
IC
4
0
2
RS
-232
C
-T
I2
C
12
V
A
udi
o
a
m
p
(T
P
A
3
1
2
4
D
2
)
IC
1
3
0
9
L/
R
TU
_
S
IF
IF
_
A
G
C
74L
V
C
1
62
44
Bu
ff
e
r
IC
15
01
LGDT1129
FPGA
I C1503
Ms
ta
r
S
7
LG
E
1
0
1
D
x
(I
C
1
0
1
)